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Reliability limits of TMR implemented in a SRAM-based FPGA: Heavy ion measures vs. fault injection predictions.

Gilles FoucardPaul PeronnardRaoul Velazco
Published in: LATW (2010)
Keyphrases
  • fault injection
  • high speed
  • low cost
  • power consumption
  • java card
  • hardware implementation
  • confidence levels
  • data management
  • low power
  • fault model
  • reconfigurable hardware