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A graph representation for programmable logic arrays to facilitate testing and logic design.

Jing-Jou TangKuen-Jong LeeBin-Da Liu
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)
Keyphrases
  • graph representation
  • programmable logic
  • computer vision
  • case study
  • graph model
  • real time
  • high level
  • data structure
  • pattern recognition
  • software systems
  • bipartite graph
  • hardware description language