Login / Signup

Probabilistic Approach for Yield Analysis of Dynamic Logic Circuits.

Lucas BrusamarelloRoberto da SilvaGilson I. WirthRicardo A. L. Reis
Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2008)
Keyphrases
  • logic circuits
  • real time
  • bayesian networks
  • image analysis
  • probabilistic model
  • boolean functions
  • low power