A 0.4-V 0.66-fJ/Cycle Retentive True-Single-Phase-Clock 18T Flip-Flop in 28-nm Fully-Depleted SOI CMOS.
François StasDavid BolPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2018)
Keyphrases
- single phase
- silicon on insulator
- cmos technology
- flip flops
- power consumption
- power dissipation
- power supply
- low power
- input output
- high speed
- nm technology
- control algorithm
- control method
- pulse width modulation
- active power filter
- ibm power processor
- low voltage
- parallel processing
- low cost
- induction motor
- power management
- output voltage
- digital signal processing
- image sensor
- expert systems
- error resilience
- hardware and software