A FPGA IEEE-754-2008 Decimal64 Floating-Point Multiplier.
Carlos MincholaGustavo SutterPublished in: ReConFig (2009)
Keyphrases
- hardware implementation
- field programmable gate array
- fpga implementation
- high speed
- hardware architecture
- signal processing
- dedicated hardware
- hardware design
- software implementation
- computer society
- floating point
- real time image processing
- fpga technology
- intelligent agent technology
- wireless lan
- floating point arithmetic
- type ii
- image processing algorithms
- efficient implementation
- low cost
- data sets
- verilog hdl
- fpga hardware
- gate array
- denoising