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A 2GHz image-reject receiver in a low IF architecture fabricated in a 0.1µm CMOS technology.
Magnus Wiklund
Stefan Nilsson
Christian Bjork
Sven Mattisson
Published in:
ISCAS (2) (2003)
Keyphrases
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cmos technology
spl times
low power
high speed
power consumption
multiscale
input image
single image
image analysis
feature points
image segmentation
image processing algorithms
edge detection
low voltage
low cost
frame rate
image sensor
digital signal processing