A multiplier-accumulator macro for a 45 MIPS embedded RISC processor.
Hiroalti MurakamiNaoka YanoYukio OotaguroYukio SugenoMaki UenoYukinori MuroyaTsuneo AramakiPublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- instruction set
- floating point
- embedded systems
- application specific
- high speed
- hough transform
- computer architecture
- parallel processing
- embedded processors
- computation intensive
- fixed point
- neural network
- memory subsystem
- dynamic random access memory
- ibm zenterprise
- multiprocessor systems
- single chip
- multiresolution