Power mitigation of a heterogeneous multicore architecture on FPGA/ASIC by DFS/DVFS techniques.
Sajjad NouriDavide RossiJari NurmiPublished in: Microprocess. Microsystems (2018)
Keyphrases
- hardware architecture
- hardware implementation
- xilinx virtex
- power reduction
- power consumption
- memory management
- field programmable gate array
- software implementation
- fpga implementation
- single chip
- hardware architectures
- fpga technology
- dedicated hardware
- low power
- parallel architecture
- design methodology
- real time
- pipelined architecture
- efficient implementation
- hardware design
- depth first search
- loosely coupled
- signal processing
- fpga device
- level parallelism
- processing elements
- power dissipation
- heterogeneous environments
- high speed
- hardware software
- instruction set
- multithreading
- reconfigurable hardware
- heterogeneous systems
- integrated circuit
- associative memory