Static probabilistic worst case execution time estimation for architectures with faulty instruction caches.
Damien HardyIsabelle PuautPublished in: RTNS (2013)
Keyphrases
- probabilistic model
- bayesian networks
- instructional design
- memory hierarchy
- continuous valued
- uncertain data
- estimation error
- generative model
- accurate estimation
- computer assisted instruction
- fault diagnosis
- information theoretic
- parameter estimation
- robust estimation
- cooperative learning
- probabilistic logic
- estimation process
- em algorithm
- probability distribution