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On the temperature dependence of hysteresis effect in floating-body partially depleted SOI CMOS circuits.
Ruchir Puri
Ching-Te Chuang
Mark B. Ketchen
Mario M. Pelella
Michael G. Rosenfield
Published in:
IEEE J. Solid State Circuits (2001)
Keyphrases
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analog vlsi
high speed
delay insensitive
circuit design
vlsi circuits
silicon on insulator
power dissipation
cmos technology
floating gate
human body
power consumption
low power
chip design
low cost
phase transition
random access memory