Area and delay trade-offs in the circuit and architecture design of FPGAs.

Ian Kuon Jonathan Rose

Published in: FPGA (2008)

Keyphrases

low power
power dissipation
trade off
power consumption
high speed
low cost
cmos technology
logic circuits
delay insensitive
analog circuits
field programmable gate array
data sets
neural network
hardware software
low voltage
evolutionary algorithm
qualitative probabilistic networks