FPGA implementation of low-power and high-PSNR DCT/IDCT architecture based on adaptive recoding CORDIC.
Jianfeng ZhangPaul ChowHengzhu LiuPublished in: FPT (2015)
Keyphrases
- fpga implementation
- low power
- low power consumption
- hardware implementation
- power consumption
- low cost
- high speed
- field programmable gate array
- image compression
- discrete cosine transform
- single chip
- bit rate
- blocking artifacts
- image quality
- image processing algorithms
- mixed signal
- cmos technology
- embedded systems
- real time
- video coding
- signal processing
- general purpose
- transform domain
- low bit rate
- visual quality
- computational complexity
- pattern recognition
- image processing