A Network-on-Chip-based turbo/LDPC decoder architecture.
Carlo CondoMaurizio MartinaGuido MaseraPublished in: DATE (2012)
Keyphrases
- network on chip
- turbo codes
- routing algorithm
- multi processor
- error correction
- distributed video coding
- ldpc codes
- low density parity check
- packet switched
- network simulator
- channel coding
- low complexity
- distributed systems
- data transfer
- wireless sensor networks
- interconnection networks
- power dissipation
- distributed source coding
- packet loss