A low-power subscriber line interface circuit in a high-voltage CMOS technology.
Mohammad B. VahidfarArmin TajalliSeyed Mojtaba AtarodiPublished in: ISCAS (5) (2002)
Keyphrases
- cmos technology
- low power
- high voltage
- power consumption
- high speed
- low cost
- low voltage
- operating conditions
- single chip
- power dissipation
- logic circuits
- mixed signal
- normal operation
- vlsi circuits
- digital signal processing
- low power consumption
- power reduction
- delay insensitive
- image processing
- silicon on insulator
- steady state
- mathematical model
- image sensor
- gate array