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Fault-tolerant design of the IBM pSeries 690 system using POWER4 processor technology.
Douglas C. Bossen
Alongkorn Kitamorn
Kevin Reick
Michael S. Floyd
Published in:
IBM J. Res. Dev. (2002)
Keyphrases
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fault tolerant
fault tolerance
memory subsystem
distributed systems
ibm power processor
case study
fault isolation
functional verification
gate array
chip design
state machine
load balancing
high availability
computer architecture
power consumption
single chip
high assurance
computer systems