Power-balanced reconfigurable floating-gate-MOS logic circuit for tamper resistant VLSI.

Benjamas Tongprasit Tadashi Shibata

Published in: ISCAS (2006)

Keyphrases

floating gate
power dissipation
chip design
power consumption
circuit design
battery powered
high speed
vlsi circuits
low power
power reduction
logic circuits
signal processing
cmos technology
gate array
single phase
artificial neural networks
digital signal processing
digital circuits
energy efficiency
feature space