A novel architecture for power maskable arithmetic units.
Luca BeniniAlberto MaciiEnrico MaciiElvira OmerbegovicMassimo PoncinoFabrizio ProPublished in: ACM Great Lakes Symposium on VLSI (2003)
Keyphrases
- power consumption
- processing units
- power management
- software architecture
- machine learning
- information systems
- wireless sensor networks
- management system
- real time
- multi layer
- design considerations
- conceptual model
- power losses
- multithreading
- architectural design
- computational power
- reference model
- multi agent
- real world