Interconnect Synthesis for Reconfigurable Multi-FPGA Architectures.
Vinoo SrinivasanShankar RadhakrishnanRanga VemuriJeffrey WalrathPublished in: IPPS/SPDP Workshops (1999)
Keyphrases
- high speed
- field programmable gate array
- hardware implementation
- interconnection networks
- low cost
- digital signal
- systolic array
- reconfigurable architecture
- hardware design
- software implementation
- digital signal processors
- reconfigurable hardware
- fpga implementation
- real time image processing
- general purpose
- dedicated hardware
- power reduction
- neural network
- texture synthesis
- low power
- embedded systems