A Dynamically Reconfigurable FPGA-Based Pattern Matching Hardware for Subclasses of Regular Expressions.
Yusaku KanetaShingo YoshizawaShin-ichi MinatoHiroki ArimuraYoshikazu MiyanagaPublished in: IEICE Trans. Inf. Syst. (2012)
Keyphrases
- regular expressions
- pattern matching
- hardware architecture
- hardware implementation
- field programmable gate array
- semistructured data
- finite automata
- tree automata
- cost model
- string matching
- regular languages
- tree matching
- regular path queries
- pattern matching algorithm
- deterministic finite automata
- boyer moore
- context free grammars
- bit parallel
- approximate pattern matching