Efficient Leading Zero Count (LZC) Implementations for Xilinx FPGAs.

Ali Zahir Anees Ullah Pedro Reviriego Syed Riaz Ul Hassnain

Published in: IEEE Embed. Syst. Lett. (2022)

Keyphrases

hardware implementation
field programmable gate array
multiscale
high speed
computationally efficient
highly efficient
data sets
machine learning
decision trees
data structure