An efficient and scalable hardware architecture for singular value decomposition towards massive MIMO communications.
Mingda ZhouYoujian LiuTian XiaXinming HuangPublished in: MWSCAS (2017)
Keyphrases
- singular value decomposition
- hardware architecture
- communication systems
- least squares
- hardware implementation
- dimension reduction
- low rank
- singular values
- latent semantic indexing
- hardware architectures
- principal component analysis
- dimensionality reduction
- associative memory
- signal processing
- low rank approximation
- low rank matrix