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200-MHz Single-Ended 6T 1-kb SRAM With 0.2313 pJ Energy/Access Using 40-nm CMOS Logic Process.
Chua-Chin Wang
Chien-Ping Kuo
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2021)
Keyphrases
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power consumption
cmos technology
high speed
knowledge base
low power
low cost
access control
energy consumption
neural network
high frequency
nm technology