Fault-Tolerant Array Processors Via Reconfiguration of Two-Level Redundancy Arrays.
Stephen Y. H. SuRong YaoPublished in: PDPTA (1997)
Keyphrases
- fault tolerant
- linear array
- fault tolerance
- multidimensional arrays
- parallel algorithm
- focal plane
- processing elements
- distributed systems
- processor array
- minimum redundancy
- interconnection networks
- load balancing
- infrared
- state machine
- parallel processing
- high availability
- parallel computing
- parallel processors
- data structure
- manufacturing systems
- high speed
- complex systems
- database management systems
- fault isolation
- database
- content addressable memory