Area, Throughput, and Power Trade-Offs for FPGA- and ASIC-Based Execution Stream Compression.
Maria Isabel MeraJonah CaplanSeyyed Hasan MozafariBrett H. MeyerPeter A. MilderPublished in: ACM Trans. Embed. Comput. Syst. (2017)
Keyphrases
- trade off
- hardware implementation
- hardware architecture
- single chip
- xilinx virtex
- response time
- field programmable gate array
- data streams
- power consumption
- compression ratio
- allocation scheme
- real time
- power reduction
- image compression
- memory management
- high speed
- compression algorithm
- clock frequency
- signal processing
- design methodology
- real time image processing
- power allocation
- streaming data
- compression scheme
- data compression
- application specific
- fpga implementation
- sliding window
- circuit design
- efficient implementation
- execution engine
- integrated circuit
- reconfigurable hardware
- dedicated hardware
- low cost
- fpga device
- computing systems
- low power
- verilog hdl