A low power multi-rate decoder hardware for IEEE 802.11n LDPC codes.
Merve PeyicHakan BabaErdem GuleyubogluIlker HamzaogluMehmet KeskinozPublished in: Microprocess. Microsystems (2012)
Keyphrases
- low density parity check
- ldpc codes
- low power
- low cost
- rate allocation
- error correction
- vlsi architecture
- decoding algorithm
- physical layer
- message passing
- channel coding
- high speed
- power consumption
- channel capacity
- low power consumption
- distributed video coding
- image transmission
- video coding
- real time
- error detection
- end to end
- rate distortion
- source coding
- vlsi implementation
- distributed source coding
- error resilience
- single pass
- bitstream
- low complexity
- bit plane
- forward error correction
- bit rate
- image compression
- motion estimation