An On-Chip Trainable and Scalable In-Memory ANN Architecture for AI/ML Applications.
Abhash KumarSai Manohar BeerakaJawar SinghBharat GuptaPublished in: Circuits Syst. Signal Process. (2023)
Keyphrases
- multithreading
- memory access
- artificial neural networks
- level parallelism
- vlsi implementation
- memory subsystem
- artificial intelligence
- analog vlsi
- digital signal processors
- associative memory
- genetic algorithm
- host computer
- low cost
- expert systems
- back propagation
- scalable distributed
- low memory
- maximum likelihood
- memory management
- storage devices
- cmos image sensor
- limited memory
- memory requirements
- network on chip
- using artificial neural networks
- case based reasoning
- high speed
- neural network
- multi processor
- subsumption architecture
- random access memory
- memory hierarchy
- main memory
- single chip
- memory efficient
- neural network model