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A Self-Calibrated On-Chip Phase-Noise Measurement Circuit With -75 dBc Single-Tone Sensitivity at 100 kHz Offset.

Waleed KhalilBertan BakkalogluSayfe Kiaei
Published in: IEEE J. Solid State Circuits (2007)
Keyphrases
  • high speed
  • analog vlsi
  • circuit design
  • low cost
  • real time
  • chip design
  • data acquisition
  • digital circuits
  • evolvable hardware
  • sensitivity analysis