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A 36-Gb/s 2× Half-Baud-Rate Adaptive Receiver in 28-nm CMOS.
Yi-Hao Lan
Shen-Iuan Liu
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2024)
Keyphrases
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high speed
low cost
nm technology
computer simulation
cmos technology
real time
power consumption