• search
    search
  • reviewers
    reviewers
  • feeds
    feeds
  • assignments
    assignments
  • settings
  • logout

A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs.

Federico AngioliniPaolo MeloniSalvatore CartaLuigi RaffoLuca Benini
Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2007)
Keyphrases
  • image processing
  • low cost
  • quantitative analysis
  • real time
  • data analysis
  • high bandwidth