A Power- and Area-Efficient SRAM Core Architecture with Segmentation-Free and Horizontal/Vertical Accessibility for Super-Parallel Video Processing.
Junichi MiyakoshiYuichiro MurachiTomokazu IshiharaHiroshi KawaguchiMasahiko YoshimotoPublished in: IEICE Trans. Electron. (2006)
Keyphrases
- video processing
- video segmentation
- power consumption
- image and video processing
- video analysis
- real time
- video compression
- image processing
- video surveillance
- image segmentation
- segmentation method
- segmentation algorithm
- multiscale
- energy function
- background subtraction
- signal processing
- object detection
- shared memory
- multimedia
- multithreading
- real time video processing