Design Techniques of High Speed PHY using Highly compact FOVEROS Through Silicon Via.
Sanjib BasuDror LazarRupesh PothineniPublished in: ISCAS (2022)
Keyphrases
- high speed
- real time
- design decisions
- design process
- neural network
- case study
- low cost
- low power
- cmos technology
- user interface
- design methodology
- computer aided
- high speed networks
- design parameters
- design space
- software architecture
- control system
- evolutionary algorithm
- expert systems
- learning algorithm
- real world
- data sets