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An 8-bit 200-MSample/s Pipelined ADC With Mixed-Mode Front-End S/H Circuit.
Shan Jiang
Manh Anh Do
Kiat Seng Yeo
Wei Meng Lim
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2008)
Keyphrases
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mixed mode
analog to digital converter
sigma delta
back end
shift register
high speed
data flow
code generation
circuit design
flip flops
random number generator
object oriented
digital circuits
instruction set architecture
real world
power reduction