24-bit significand multiplier for FPGA floating-point multiplication.

E. George Walters III

Published in: ACSSC (2015)

Keyphrases

floating point
xilinx virtex
square root
fixed point
fpga device
hardware implementation
field programmable gate array
sparse matrices
high speed
instruction set
interval arithmetic
fast fourier transform
hardware architecture
computer systems
signal processing
low cost
floating point arithmetic