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Research on the influences of well structure on dose rate effects in 65nm CMOS circuit.

Qian ChenJianwei HanYingqi MaSai LiJingtian LiuYaqing ChiBin Liang
Published in: IEICE Electron. Express (2020)
Keyphrases
  • high speed
  • circuit design
  • cmos technology
  • analog vlsi
  • delay insensitive
  • real time
  • low cost
  • structural information
  • graph structure
  • image processing
  • individual differences
  • low voltage
  • silicon on insulator