A Low-Power CMOS Circuit Which Emulates Temporal Electrical Properties of Neurons.
Jack L. MeadorClint S. ColePublished in: NIPS (1988)
Keyphrases
- low power
- high speed
- cmos technology
- electrical properties
- power consumption
- logic circuits
- low cost
- power dissipation
- delay insensitive
- vlsi circuits
- power reduction
- gate array
- single chip
- mixed signal
- ultra low power
- wireless transmission
- nm technology
- low voltage
- high power
- image sensor
- wide dynamic range
- low power consumption
- vlsi architecture
- circuit design
- digital signal processing
- parallel processing
- hardware and software