An RDL-configurable 3D memory tier to replace on-chip SRAM.
Marco FacchiniPaul MarchalFrancky CatthoorWim DehaenePublished in: DATE (2010)
Keyphrases
- random access memory
- design considerations
- embedded dram
- low voltage
- dynamic random access memory
- memory access
- power dissipation
- high speed
- power consumption
- low power
- low cost
- memory subsystem
- main memory
- cmos technology
- data transmission
- memory requirements
- flash memory
- multithreading
- high bandwidth
- power reduction
- memory bandwidth
- chip design
- memory space
- digital signal processors
- data acquisition
- memory usage