Hazard Checking of Timed Asynchronous Circuits Revisited.

Frédéric Béal Tomohiro Yoneda Chris J. Myers

Published in: Fundam. Informaticae (2008)

Keyphrases

asynchronous circuits
model checking
process algebra
petri net
delay insensitive
timed automata
verification method
real time
risk assessment
finite state machines
discrete event
expert systems
artificial intelligence
dynamic systems
simulation model
np complete
safety analysis
neural network