Tapered-VTH CMOS buffer design for improved energy efficiency in deep nanometer technology.
Fabio FrustaciPasquale CorsonelloMassimo AliotoPublished in: ISCAS (2011)
Keyphrases
- energy efficiency
- power consumption
- nm technology
- energy consumption
- low cost
- wireless sensor networks
- cmos technology
- user interface
- response time
- design considerations
- energy saving
- energy efficient
- databases
- low power
- circuit design
- cost effective
- sensor networks
- power dissipation
- packet delivery
- database systems
- database
- finite element
- end to end
- artificial intelligence
- intelligent agents
- shortest path