A self-refereed design-for-test structure of CP-PLL for on-chip jitter measurement.

Lanhua Xia Jianhui Wu Zhikuang Cai

Published in: IEICE Electron. Express (2018)

Keyphrases

physical design
information systems
user interface
computer aided
built in self test
case study
low cost
high speed
design process
network structure
experimental design
evolvable hardware
vlsi design
low power consumption