Fully-Pipelined Architecture for Simulated Annealing-based QUBO Solver on the FPGA.
Hiroshi KagawaYasuaki ItoKoji NakanoRyota YasudoYuya KawamataRyota KatsukiYusuke TabataTakashi YazaneKenichiro HamanoPublished in: CANDAR (2020)
Keyphrases
- pipelined architecture
- simulated annealing
- field programmable gate array
- hardware implementation
- simulated annealing algorithm
- evolutionary algorithm
- tabu search
- hardware design
- metaheuristic
- global optimum
- genetic algorithm
- embedded systems
- real time
- genetic algorithm ga
- stochastic search
- signal processing
- distributed systems
- hardware architecture
- neural network
- machine learning
- artificial intelligence
- parallel computing
- image processing algorithms
- software engineering
- low cost
- high speed
- data processing