Login / Signup

Dual priority congestion aware shared-resource Network-on-Chip architecture.

Hao ShuJiangyi ShiPeijun MaHuaxi GuWeitao PanLin-An Yang
Published in: IEICE Electron. Express (2016)
Keyphrases
  • network on chip
  • routing algorithm
  • multi processor
  • packet switched
  • data transfer
  • network simulator
  • resource management
  • real time
  • wireless sensor networks
  • computer networks
  • ad hoc networks
  • packet loss