A -0.5V-input voltage booster circuit for on-chip solar cells in 0.18µm CMOS technology.

Tomoya Kimura Hiroyuki Ochi

Published in: ISCIT (2015)

Keyphrases

cmos technology
low voltage
low power
spl times
power consumption
power dissipation
parallel processing
high speed
mixed signal
random access memory
low cost
single chip
image sensor
computer vision
design considerations
embedded dram
image sequences