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A 16-nm Always-On DNN Processor With Adaptive Clocking and Multi-Cycle Banked SRAMs.
Sae Kyu Lee
Paul N. Whatmough
David Brooks
Gu-Yeon Wei
Published in:
IEEE J. Solid State Circuits (2019)
Keyphrases
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high speed
data sets
databases
e learning
semi supervised
general purpose
low cost
data driven
parallel processing
parallel architecture