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Using Non-trivial Logic Implications for Trace Buffer-Based Silicon Debug.

Sandesh PrabhakarMichael S. Hsiao
Published in: Asian Test Symposium (2009)
Keyphrases
  • high speed
  • modal logic
  • multi valued
  • classical logic
  • logic programming
  • real time
  • neural network
  • low cost
  • high density
  • buffer size
  • power consumption
  • logical framework
  • virtual memory
  • proof theory