Integrated 16-Channel Neural Recording Circuit with SPI Interface and Error Correction Code in 130Nm CMOS Technology.
Andreas BahrLait Abu SalehDietmar SchroederWolfgang H. KrautschneiderPublished in: BIODEVICES (2016)
Keyphrases
- cmos technology
- error correction
- error control
- magnetic tape
- bit errors
- reed solomon
- channel coding
- low power
- error correcting
- block codes
- error detection
- ldpc codes
- cmos image sensor
- turbo codes
- power consumption
- low voltage
- parallel processing
- low density parity check
- error detection and correction
- power dissipation
- image sensor
- silicon on insulator
- source coding
- multi channel
- error resilience
- watermarking scheme
- high speed
- embedded dram
- low cost