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An implementation of a new 11-bit 1.2 GS/s hybrid DAC with a noval 3-bit Sub-DAC.
Hossein Ghasemian
Amirhossein Ahmadi
Ebrahim Abiri
Mohammad Reza Salehi
Published in:
Microelectron. J. (2020)
Keyphrases
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bit parallel
database
max csp
block cipher
data sets
information systems
video sequences
search algorithm
image compression
implementation details
pseudorandom
error correcting codes
bit vectors
random number generator