Accelerating Huffman Encoding Using 512-Bit SIMD Instructions.

Yue Yu Zhe Zhao Sian-Jheng Lin Weihai Li

Published in: IEEE Trans. Consumer Electron. (2024)

Keyphrases

bit wise
parallel algorithm
binary representation
parallel processing
massively parallel
bit string
instruction set architecture
arithmetic coding
variable length
fractal image compression
run length
real time
encoding scheme
mesh connected