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30-Gb/s 1.11-pJ/bit Single-Ended PAM-3 Transceiver for High-Speed Memory Links.
Hyunsu Park
Junyoung Song
Jincheol Sim
Yoonjae Choi
Jonghyuck Choi
Jeongsik Yoo
Chulwoo Kim
Published in:
IEEE J. Solid State Circuits (2021)
Keyphrases
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high speed
shift register
low power
link analysis
computing power
random access
gigabit ethernet
real time
computational power
link structure
memory usage
random access memory
direct memory access