Improving min-sum LDPC decoding throughput by exploiting intra-cell bit error characteristic in MLC NAND flash memory.
Wenzhe ZhaoHongbin SunMinjie LvGuiqiang DongNanning ZhengTong ZhangPublished in: MSST (2014)
Keyphrases
- flash memory
- bit errors
- error correction
- min sum
- file system
- random access
- embedded systems
- main memory
- b tree
- video transmission
- channel coding
- unequal error protection
- database systems
- data storage
- storage devices
- turbo codes
- bit error rate
- lower bound
- data structure
- error resilient
- packet loss
- error concealment
- application layer
- video streams
- database management systems
- np hard
- video sequences
- image sequences