CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction.
Joung-Yeal KimYoung-Hyun JunBai-Sun KongPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2009)
Keyphrases
- power consumption
- high speed
- charge coupled devices
- low power
- portfolio selection
- passive aggressive
- transfer learning
- optimal solution
- vlsi circuits
- low cost
- condition monitoring
- neural network
- asynchronous circuits
- record linkage
- optimal design
- knowledge transfer
- error propagation
- cross domain
- data acquisition
- high pressure
- multi objective
- cmos image sensor
- real time